PURPOSE: To provide a digital delay circuit of a simple constitution.

CONSTITUTION: A digital delay circuit delays the input timing signal 2a which is synchronous with a main signal 1a and consists of a 1st counter circuit 3 which detects the delay time of the signal 1a, an edge differentiating circuit 4 which extracts the edge of the signal, 2a, a 2nd counter circuit 5 which starts a counting operation based on the output signal 4a of the circuit 4 and continues the counting operation based on the delay data 3a, and a latch circuit 6 which outputs an output timing signal 2b which is obtained by latching the signal 2a with the output signal of the circuit 5.