PURPOSE: To provide a digital demodulator capable of improving the detection characteristic by controlling a quantization number depending on a received signal level so as to increase a phase quantization number in a weak electric field strength where a reception signal level is low and saving the power consumption by reducing the phase quantization number in a strong electric field strength where a reception signal level is high.
CONSTITUTION: The demodulator is provided with a phase quantization number prediction means 6 for outputting designated phase quantization number prediction data depending on a reception level, a reference clock generating means 5 for generating a reference clock with a frequency depending on the phase quantization number prediction data from a received clock signal, and a phase quantization number control means 3 for controlling the phase quantization number depending on the phase quantization number prediction data. When the reception level is low, the detection characteristic is enhanced by improving the phase quantization number and when the reception level is high, the power consumption is reduced by decreasing the logic processing speed.
| JPH04207548 | SYNCHRONIZATION DEVICE |
| JPS6053977 | [Title of the Invention] Frequency deviation recovery method |
| JP2019132757 | RADAR RECEIVER |
YAMADA IZURU
KOBAYASHI YUTAKA
HITACHI COMMUNICATION SYSTEM