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Title:
DIGITAL FILTER, SAMPLING FREQUENCY CONVERTER USING THE FILTER AND MUSE DECODER
Document Type and Number:
Japanese Patent JPH05335888
Kind Code:
A
Abstract:

PURPOSE: To reduce the cost by using a 1st changeover means to select sequentially n-series of input signals by a frequency of f1×n and to give the selected signal to an FIR filter and using a 2nd changeover means to select sequentially outputs of the FIR filter by a frequency of f1×n.

CONSTITUTION: A 1st changeover means 22 is used to select alternately two series of signals X, Y and the result is inputted to an FIR filter 23 as a signal whose frequency is f1×n. A same signal series appears on taps T1-Tr of delay blocks 241-24r-1 of unit delay elements D1i, Di2 connected in series, the coefficients are multiplied with data as to the signal series X in a timing by coefficient multiplier means 251-25r-1, the coefficients are multiplied with data as to the signal series Y in a timing after a succeeding 1/f1×2 by the means 251-25r-1, the result is added by an adder means 26 and the sum is given to the 2nd changeover means 27. The signals at a frequency of f1×n is switched alternately in the means 27 and outputted to output signal lines 28x, 28y and a filter passing signal as to the series X is outputted to the signal line 28x and a filter passing signal as to the series Y is outputted to the signal line 28y, where f1 is a sampling frequency of the input signal.


Inventors:
SHIZAWA HIROSHI
Application Number:
JP11242391A
Publication Date:
December 17, 1993
Filing Date:
April 17, 1991
Export Citation:
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Assignee:
LSI LOGIC KK
International Classes:
H04N7/015; H03H17/00; H03H17/02; H03H17/06; H04N19/00; H04N19/42; H04N19/436; H04N19/59; H04N19/80; H04N19/85; (IPC1-7): H03H17/02; H03H17/06; H04N7/00; H04N7/13
Attorney, Agent or Firm:
Takehisa Toyota (1 outside)



 
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