Document Type and Number:
Japanese Patent JP3045079
PROBLEM TO BE SOLVED: To provide the digital filter in which a test circuit is mounted, which easily tests an integration device at each tap of the digital filter without increasing a chip area.
SOLUTION: In a transversal digital filter 300 configured by n-sets of taps 20n each provided with an integration device 40n generating a coefficient, a delay circuit 35n providing a unit delay to an input signal from a pre-stage and outputting the result to a next stage, and a multiplier 5n multiplying an output signal of the delay circuit 35n and the coefficient generated from the integration device 40n and which are connected in cascade, each of the n-sets of the taps 20n is provided with a test means which is placed between the delay circuit 35n and the multiplier 5n, extracts an output of the integration device 40n of a prescribed tap as it is and sets an output of the other tap to '0'.
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