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Patent Searching and Data


Title:
DIGITAL INPUT CIRCUIT AND ELECTRONIC EQUIPMENT
Document Type and Number:
Japanese Patent JPH1070449
Kind Code:
A
Abstract:

To provide a digital input circuit and an electronic equipment in which useless current consumption is reduced when an input line is pulled up or pulled down.

This electronic device is constituted of a three-state buffer 14, a switch S connected between an input line 14a and a ground line, a resistor 16 to pull up or pull down the input line 14a, a buffer 15 applying a high or low level voltage to the resistor 16, an address decoder 17 outputting a high or low level selection signal SEL based on a command from a CPU 11, and the like. When the selection signal SEL becomes a high level, the output of the buffer 15 becomes a high level and a resistor 16 acts like a pull-up resistor. When the selection signal SEL becomes a low level, the output of the buffer 15 becomes a low level and the resistor 16 acts like a pull-down resistor.


Inventors:
MORI YUJI
Application Number:
JP22710096A
Publication Date:
March 10, 1998
Filing Date:
August 28, 1996
Export Citation:
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Assignee:
STAR MFG CO
International Classes:
G06F1/32; H03K19/003; H03K19/0175; (IPC1-7): H03K19/0175; G06F1/32; H03K19/003
Attorney, Agent or Firm:
Nishikyo Keiichiro