Title:
DIGITAL MODULATION DEVICE
Document Type and Number:
Japanese Patent JP3492512
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To remove a DC component with a remarkably small circuit scale and low power consumption by adding respective initial values of a positive initial value group or a negative initial value group out of 2N pieces of the entire digital data to the head of the recording data, performing convolution processing, performing NRZI modulation processing for the convolution processed data and providing the two processing means for the above processings in parallel for every initial value.
SOLUTION: The positive initial value group TA or the negative initial value group TB is added to the recording data from an error correction code addition circuit as the initial value at every 91 word code recording data. The 91 word code recording data are transferred to respective initial value setting parts 101, and a prescribed initial value T is added in convolution circuits 1 to be made 92 words, and the convolution processing are performed, and the NRZI modulation processing are performed in NRZI modulation circuits 2. The outputs of the NRZI modulation circuits 2 are inputted to DSV calculation circuits 3, and DSV at every one word is calculated. DSV comparators 4 add the DSV before one word to the DSV sent from the DSV calculation circuits 3.
Inventors:
Yasutaka Iijima
Chijuko Endo
Takeshi Kawamura
Takayoshi Yamaguchi
Chijuko Endo
Takeshi Kawamura
Takayoshi Yamaguchi
Application Number:
JP4808698A
Publication Date:
February 03, 2004
Filing Date:
February 27, 1998
Export Citation:
Assignee:
Sharp Corporation
International Classes:
G11B20/14; (IPC1-7): G11B20/14
Domestic Patent References:
| JP10208404A |
Attorney, Agent or Firm:
Eisuke Fujimoto