To provide a phase comparator which consists of a full digital circuit of high performance at a low cost.

An exclusive OR is secured via an exclusive OR gate 22 and accordingly the phase difference value is detected for the signals which are latched by the D flip-flops 10 and 12. At the same time, an exclusive OR is secured for the preceding and next signals of the D flip-flops 16 and 18 to extract two waveform edges. These waveform edges are supplied to an RS flip-flop 26 for detection of a phase difference code (leading or lagging phase). The phase difference value and the phase difference code are supplied to a counter 30 where a phase difference is detected.