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Patent Searching and Data


Title:
DIGITAL PHASE SYNCHRONIZING CIRCUIT
Document Type and Number:
Japanese Patent JPH0340523
Kind Code:
A
Abstract:

PURPOSE: To attain the phase synchronism even when the input interval of signals is wide and their frequency difference is large by starting phase control in accordance with the starting period of a phase control corresponding to advance/delay estimated from a phase comparing result.

CONSTITUTION: A continuous counter 2 counts up the continued number of advance/delay phase comparing results. A control circuit 3 increases the value of a negative register 5 for determining the period of delay phase control if the continued number of advances is larger than the continued number of delays when the phase comparing result is changed to delay or reduces the value of a plus register 4 for determining the period of advancing phase control when the continued number of delays is larger than the continued number of advances. A selector 6 outputs the contents of the positive register 4 when the phase comparing result is advance or outputs the contents of the negative register 5 in the case of the delay result and a phase control starting circuit 7 uses the output of the selector 6 as a period to start phase control at every period. Thereby, even when the input interval of signals is wide and their frequency difference is large, phase synchronism can be attained.


Inventors:
KUBO HIROTSUGU
Application Number:
JP17631589A
Publication Date:
February 21, 1991
Filing Date:
July 06, 1989
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H03L7/06; (IPC1-7): H03L7/06
Attorney, Agent or Firm:
Masuo Oiwa (2 outside)