PURPOSE: To improve the jitter suppressing characteristic of this system by discriminating the presence/absence of the mission of a write clock during the period from the occurrence of a carrying or borrowing output from an up-down counter to the overflow of a memory and, when the omission exists, invalidating the carrying or borrowing output.

CONSTITUTION: In a digital PLL circuit 1, a phase comparator 10 compares the phase of a write clock WCK with that of a readout clock RCK and a pulse insertion/removal circuit 40 inserts or removes a pulse into or from the output of an oscillator 30. When a carrying or borrowing output CA or BO occurs, the number of clocks from the position where the output CA or BO occurs to the overflow of a memory is found and, when the omitted bit of the write clock WCK is present in the counted number of clocks, the carrying or borrowing output CA or BO outputted from an up-down counter 29 is invalidated so as to improve the clock jitter characteristic.