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Title:
DIGITAL SIGNAL EXTRACTING CIRCUIT IN PCM REPRODUCER
Document Type and Number:
Japanese Patent JPS58189811
Kind Code:
A
Abstract:

PURPOSE: To attain the extraction of accurate data, by detecting a peak level when a data synchronizing signal exists and obtaining the optimum slice level for extraction of digital data in following to a distored signal waveform.

CONSTITUTION: The high potential peak level PH and the low potential peak level PL at a period T when the data synchronizing signal A exists are inputted to a voltage division circuit consists of resistors R1 and R2, where they are brought to the optimum slice level in following to an input signal waveform, and the result is applied to a comparison signal terminal of a comparator 3, where a false video signal applied from a clamp circuit 2 is compared with the optimum slice level in following to the signal waveform from the the circuit 7, and an accurate digital output is extracted from the output.


Inventors:
SHIROMIZU MASAKAZU
Application Number:
JP5457382A
Publication Date:
November 05, 1983
Filing Date:
March 31, 1982
Export Citation:
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Assignee:
AKAI ELECTRIC
International Classes:
H04L25/03; G11B20/10; (IPC1-7): G11B5/09; H04L25/40
Domestic Patent References:
JP55093824B



 
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