To reduce power consumption and an amount of heat generation in a digital signal processing circuit and an on-vehicle electronic apparatus.

A digital signal processing circuit mounted to an on-vehicle electronic apparatus comprises: a flip flop circuit of an input stage that is synchronized with a clock signal and performs signal acquisition; a flip flop circuit of an output stage that is synchronized with the clock signal and performs the signal acquisition; a combined circuit group that is synchronized with the clock signal, is input with a signal of an object to be processed from the flip flop circuit of the input stage and outputs a signal subsequent to processing to the flip flop circuit of the output stage while being configured such that a plurality of combined circuits for performing sequential processing is connected in series; and a power supply circuit that is synchronized with the clock signal, provides a supply period and a non-supply period of driving power in one cycle of the clock signal for each of the plurality of combined circuits and performs driving power supply.