To provide the digital signal processing unit in which synchronization is adjusted in the processing unit of a signal processing section and the synchronization is fine-adjusted.
An input processing section 22 decomposes a data stream fed externally into data of processing units of a DSP 24 and gives them to the DSP 24 via a data memory 23 and the DSP 24 processes data in one processing unit, and provides an output of the processed data via an output processing section 25. A skip control section 26 controls the input processing section 22 in response to a skip request 20a to disregard and skip data in one processing unit. A wait control section 27 controls the input processing section 22 in response to a wait request 21a to allow the processing section 22 to await supply of data in one processing unit to the DSP 24.
JPH04241622 | MICROPROCESSOR |
JP2024047215 | Control device |
JPS5935448 | [Title of the Invention] Arbitrary start circuit |