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Title:
DIGITAL SINE WAVE LEVEL DETECTING CIRCUIT
Document Type and Number:
Japanese Patent JPS58106467
Kind Code:
A
Abstract:

PURPOSE: To eliminate the need for a filter and to detect the level of a digital sine wave, by obtaining and multiplying the difference between the input sine wave and a signal which is two samples before by a specific value, and adding its square output to the square output of a signal which is one sample before.

CONSTITUTION: A sine wave is inputted to an input terminal 10 and a signal which is one sample before is outputted by a delay circuit 1. Further, a delay circuit 2 delays the output by one sample to output a signal which is two samples before. A subtracter 3 outputs the difference 40 of the signal which is two samples away. The difference 40 is supplied to a multiplier 4 and multiplied by a specific value from an input terminal 50. The output 60 of the multiplier 4 is squared by a squaring device 5 and the output 20 of the circuit 1 is squared by a squaring device 6. The outputs of the squaring devices 5 and 6 are summed up by an adder 7, which outputs the square value of the maximum level of the input digital sine wave to its output terminal 90. Thus, this simple hardware constitution provides accurate level detection.


Inventors:
SAKAGUCHI TAKASHI
Application Number:
JP20481781A
Publication Date:
June 24, 1983
Filing Date:
December 18, 1981
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G01R19/04; H02H3/20; (IPC1-7): G01R19/25
Attorney, Agent or Firm:
Uchihara Shin



 
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