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Title:
デジタルアナログ変換回路及びデータドライバ
Document Type and Number:
Japanese Patent JP7434379
Kind Code:
B2
Abstract:
A digital-to-analog conversion circuit includes: a decoder that, if set to a first selection state, selects two different reference voltages from a reference voltage group on the basis of a digital data signal and outputs the two reference voltages as first and second selection voltages, and if set to a second selection state, selects two reference voltages from the reference voltage group in a manner allowing redundancy and outputs the two reference voltages as the first and second selection voltages; and an amplifier circuit that amplifies and outputs a voltage obtained by averaging a combination of the first and second selection voltages with weighting factors set in advance.

Inventors:
Hiroshi Tsuchi
Application Number:
JP2022008558A
Publication Date:
February 20, 2024
Filing Date:
January 24, 2022
Export Citation:
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Assignee:
LAPIS Semiconductor Co., Ltd.
International Classes:
H03M1/66; G09G3/20; G09G3/3225; G09G3/3291; G09G3/36; H03M1/76; H03M1/78
Domestic Patent References:
JP2008122455A
JP2007019801A
Attorney, Agent or Firm:
Patent Attorney Corporation Rext International Patent Office