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Title:
DIGITAL-TO-ANALOG CONVERTER
Document Type and Number:
Japanese Patent JPS57190419
Kind Code:
A
Abstract:

PURPOSE: To speed up responce by adopting a sample holding technique in case of converting a pulse train into a DC output.

CONSTITUTION: An integrated circuit 6 and a differential shaping circuit 10 are connected in parallel to an output terminal of a pulse train generating circuit 1. A sample holding circuit part 14 consisting of a field effect transistor 11 of which drain is connected to the output terminal of the integrated circuit 6 and a gate is connected to the output terminal of the differential shaping circuit 10, a capacitor 12 connected to the source of the field effect transistor 11 and a buffer circuit 13 formed by using an operational amplifier is connected to a titled converter. The output from the sample holding circuit part 14 is taken out through a low-pass filter 22 and outputted from a DC output terminal 3.


Inventors:
MORIOKA SUSUMU
Application Number:
JP7468581A
Publication Date:
November 24, 1982
Filing Date:
May 18, 1981
Export Citation:
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Assignee:
SONY CORP
International Classes:
H03M1/82; H03M1/86; (IPC1-7): H03K13/20



 
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