To provide a digital-to-analog converter (DAC) of which linearity is enhanced rather than a conventional voltage mode DAC and an overall switch area is small and which is insensitive to parasitic electric resistance.
The DAC includes a pair of operational amplifiers, each having a first input coupled to a respective high or a low reference voltage. The DAC includes a plurality of switch-controlled cells, each of which includes a resistor and two force/sense switch pairs. For each cell, all four switches are coupled to the resistor. A first force switch is coupled to the output of a first operational amplifier, and an associated sense switch is coupled to inverting input of the first operational amplifier. A second force switch is coupled to the output of a second operational amplifier, and an associated sense switch is coupled to an inverting input of the second operational amplifier.
JPH057159A | 1993-01-14 | |||
JPH06120835A | 1994-04-28 | |||
JPH057159A | 1993-01-14 | |||
JPH06120835A | 1994-04-28 |
Masatake Shiga
Takashi Watanabe
Shinya Mitsuhiro
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