Title:
DIGITAL-TO-DIGITAL CONVERTER
Document Type and Number:
Japanese Patent JPS5724137
Kind Code:
A
Abstract:
A digital-to-digital converter is arranged to provide "decimated" output samples at rate f0, each of which represent a group of input samples received at a rate m times greater. Each output is generated using overlapped triangularly weighted accumulation on an interval including 2m preceding input samples. The samples near the beginning and end of each accumulation interval receive the smallest weight, and the samples at the middle of the interval receive the greatest weight. The converter is achievable in integrated circuit form using first and second serially connected accumulators, the first accumulating m input samples without weighting and the second being used to weight the samples so that the first receives m times the weight of the last sample. The output of the first accumulator is increased in scale by the factor "m" and the output of the second accumulator subtracted therefrom. The difference is delayed so that the next m samples may be accumulated. The output of the second accumulator is then combined with the delayed subtractor output to yield the desired overlapped, triangularly weighted accumulation.
Inventors:
JIEEMUSU CHIYAARUZU KIYANDEI
BURUUSU AREN UURII
BURUUSU AREN UURII
Application Number:
JP8023381A
Publication Date:
February 08, 1982
Filing Date:
May 28, 1981
Export Citation:
Assignee:
WESTERN ELECTRIC CO
International Classes:
G06F7/544; H03H17/06; H04B14/04; H03M7/02; (IPC1-7): H03K13/24; H04B12/02
Foreign References:
| US4032914A | 1977-06-28 |