Title:
DIRECT CONVERSION RECEIVER
Document Type and Number:
Japanese Patent JP3833924
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a direct conversion receiver coping with lowering of a power supply voltage.
SOLUTION: The direct conversion receiver is provided with a DC offset signal detecting means 15 for detecting DC offset signals generated in a quadrature demodulator 4 in a digital signal processing part 13, D/A converters 12-1' and 12-2' for converting the DC offset signals detected in the DC offset signal detecting means to DC voltage signals, a quadrature modulator 18 for quadrature-modulating the DC voltage signals converted in the D/A converters, and an adder 17 for synthesizing quadrature modulation signals quadrature- modulated in the quadrature modulator and received radio frequency signals.
More Like This:
| WO/2004/071040 | OFFSET CORRECTION CIRCUIT OF A&sol D CONVERTER |
| JP5234228 | Phase compensation receiver |
| JPH05191464 | CENTER VOLTAGE SETTING DEVICE |
Inventors:
Hiroyuki Yamamoto
Application Number:
JP2001328745A
Publication Date:
October 18, 2006
Filing Date:
October 26, 2001
Export Citation:
Assignee:
Hitachi Kokusai Electric Co., Ltd.
International Classes:
H04L27/22; H04L27/38; (IPC1-7): H04L27/22; H04L27/38
Domestic Patent References:
| JP6268553A |
Attorney, Agent or Firm:
Katsuo Ogawa
Kyosuke Tanaka
Kyosuke Tanaka
Previous Patent: VARIABLE GAIN AMPLIFIER CIRCUIT
Next Patent: DOOR BODY OPERATING MECHANISM AND OPERATING APPARATUS USING THE SAME
Next Patent: DOOR BODY OPERATING MECHANISM AND OPERATING APPARATUS USING THE SAME