To speed up direct memory access(DMA) in data exchange.

A device 7 for separating a data transfer bus 6 between a memory (RAM) 4 and a peripheral equipment 5 into an A bus 61 and a B bus 62 is provided. Two temporary storage devices 81 and 82 are laid between the A bus 61 and the B bus 62. When a DMA controller 2 receives a data transfer request from the peripheral equipment 5, it separates the data transfer bus 6 and controls data exchange to complete in two cycles. In the first cycle, data, which are read from RAM 4 to the A bus 61, are stored in the first temporary storage device 81 and data supplied from the peripheral equipment 5 to the B bus 62 is stored in the second temporary storage device 82. In the second cycle, data, which are read from the first temporary storage device 81 to the B bus 62, are received by the peripheral equipment 5 and data, which are read from the second temporary storage device 82 to the A bus 61, are written into RAM 4.