Title:
DISPLAY CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JPH04298787
Kind Code:
A
Abstract:
PURPOSE: To enable high-speed drawing on a graphic memory by omitting two processes of reading a pattern out of a main memory and generating drawing data by a CPU.
CONSTITUTION: The display control circuit is equipped with a destination register 2 which reads optional destination data out of the graphic memory 1, a source register 4 which reads the drawing data out of the main memory 3, a pattern memory 5 stored with pattern data, a data generating circuit 7 which generates destination data after rewriting from the three data, and a pattern pointer register 6 stored with position data on a reference pattern. Then a repetitive pattern for the background of the destination data is composed.
Inventors:
HINAMI JIYUNJI
HASEGAWA ICHIRO
HASEGAWA ICHIRO
Application Number:
JP244191A
Publication Date:
October 22, 1992
Filing Date:
January 14, 1991
Export Citation:
Assignee:
NEC CORP
NEC NIIGATA LTD
NEC NIIGATA LTD
International Classes:
G09G5/00; G09G5/36; (IPC1-7): G09G5/00; G09G5/36
Attorney, Agent or Firm:
Uchihara Shin