To provide a display device, a display control method for the device and a memory medium saving and effectively utilizing a hardware resource.

A half area for a gradation display is used for a display area for a monochrome binary display. Two entries corresponding to pixels at coordinates of (i, j) and (i+m/2, j) in the monochrome binary display are a RAM entry corresponding to a pixel at a coordinate of (i, j) in a four gradation display. When a value of a v counter 106 is m/2 or more, or is indicating a coordinate value outside of the display area, an access to an RAM 110 is not executed. When the value of the v counter 106 is less than m/2, the access to the RAM 110 is executed twice. Data in the entries of the RAM 110 corresponding to the coordinates of (i, j) and (i+m/2, j) in the monochrome binary display are transported from a RAM manager 109 to a display manager 111.