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Title:
DISPLAY DEVICE, AND ITS MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2009211986
Kind Code:
A
Abstract:

To provide a display device suppressing occurrence of a connection failure by preventing exposure of a wiring layer or an electrode during a manufacturing process, and improving reliability of a display panel; and its manufacturing method.

At least in a display region 20 where a plurality of display pixels PIX (respective color pixels PXr, PXg, PXb) are two-dimensionally arranged, a partition wall layer 17 is formed to include boundary regions among the display pixels PIX, and cover regions other than EL element formation regions Rel (corresponding to application regions of an organic compound-containing liquid) of the respective display elements PIX. In this case, the EL element formation region Rel of each display pixel PIX is defined by the partition wall layer 17 provided with an opening 17a from which only a pixel electrode (for instance, an anode electrode) 14 of the display pixel PIX is exposed.


Inventors:
Kumagai, Minoru
Shirasaki, Tomoyuki
Application Number:
JP2008000054829
Publication Date:
September 17, 2009
Filing Date:
March 05, 2008
Export Citation:
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Assignee:
CASIO COMPUT CO LTD
International Classes:
H05B33/22; G09F9/00; G09F9/30; H01L27/32; H01L51/50; H05B33/06; H05B33/10; H05B33/12; H05B33/26; H05B33/22; G09F9/00; G09F9/30; H01L27/28; H01L51/50; H05B33/02; H05B33/10; H05B33/12; H05B33/26