Title:
DISPLAY DEVICE
Document Type and Number:
Japanese Patent JP3211969
Kind Code:
B2
Abstract:
PURPOSE: To eliminate the visual boundary of the second display screen and a surplus screen by reducing the black level of a video signal to a prescribed level over the entire display screen at the time of displaying a image on the first display screen.
CONSTITUTION: A black level correcting circuit 1 varies a resistor R3 and a capacitor C1, changes a time constant, and a block level holding circuit 3 sets the pulse width of the darkest signal detected from an input video signal VIN. Then, a black level expanding circuit 6 fetches the signal VIN from a midpoint P2 between a resistor R1 and an amplifier 2 to an input stage, and fetches the voltage of a midpoint P3 between the circuit 3 and point 5 to the input stage. Moreover, the circuit 6 reduces the detected block signal level to a pedestal level while a blanking pulse signal from a terminal 7 is falling. Thus, the borderline between the display screen and the surplus screen can prevented from being noticed by reducing the luminance level over the entire display screen.
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Inventors:
Yutaka Kamaguchi
Seiichi Nishiyama
Hisao Sakurai
Seiichi Nishiyama
Hisao Sakurai
Application Number:
JP18356691A
Publication Date:
September 25, 2001
Filing Date:
June 27, 1991
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H04N5/46; H04N7/015; H04N5/16; (IPC1-7): H04N5/16; H04N5/46
Domestic Patent References:
| JP1171382A | ||||
| JP5597775A | ||||
| JP382285A | ||||
| JP2107080A | ||||
| JP2264583A | ||||
| JP2108377A | ||||
| JP2104072A | ||||
| JP645569U |
Attorney, Agent or Firm:
Keiki Tanabe
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