Title:
Display device
Document Type and Number:
Japanese Patent JP6063491
Kind Code:
B2
Abstract:
A new TFT arrangement is demonstrated, which enables prevention of TFT to be formed over a joint portion between the adjacent SOI layers prepared by the process including the separation of a thin single crystal semiconductor layer from a semiconductor wafer. The TFT arrangement is characterized by the structure where a plurality of TFTs each belonging to different pixels is gathered and arranged close to an intersection portion of a scanning line and a signal line. This structure allows the distance between regions, which are provided with the plurality of TFTs, to be extremely large compared with the distance between adjacent TFTs in the conventional TFT arrangement in which all TFTs are arranged in at a regular interval. The formation of a TFT over the joint portion can be avoided by the present arrangement, which leads to the formation of a display device with a negligible amount of display defects.
Inventors:
Kasahara Takahiro
Application Number:
JP2015003747A
Publication Date:
January 18, 2017
Filing Date:
January 12, 2015
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G09F9/30; G02F1/1368; H01L51/50; H05B33/02; H05B33/12; H05B44/00
Domestic Patent References:
| JP2006178461A | ||||
| JP2000171775A | ||||
| JP2003108032A | ||||
| JP2042420A | ||||
| JP2001102595A | ||||
| JP10068973A | ||||
| JP1169433A | ||||
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