To provide a display device with which a circuit is not destroyed by a surge current even when a power source is impressed again in the state a high voltage charged to a horizontal deflection coil and S correction capacitor is not discharged.

Concerning this display device, a voltage charging circuit 370 connecting a polarity capacitor C1 and a diode D1 for inverse voltage prevention is provided at the power source terminal of H/V processor constant voltage part 131 inside the display device. Therefore, since a voltage impressed to an H/V processor 132 is not rapidly dropped but gradually dropped when a power source is cut off, the time for sufficiently discharging the high voltage charged to a horizontal deflection coil H-DY and an S correction capacitor Cs can be secured after the power source is cut off so that a horizontal output transistor TR can be prevented from being destroyed by the instantaneous surge current caused by the non-discharged high voltage.