Title:
LOGIC CIRCUIT
Document Type and Number:
Japanese Patent JP3187775
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce a wasteful power consumption by providing an electric charge transfer means for moving the electric charge between a first pseudo power source line and a second pseudo power source line, related to switching between a sleep mode and active mode.
SOLUTION: At transition from a sleep mode to an active mode, the electric charge is transferred between a pseudo power source line RVa and a pseudo power source line RVb by an electric charge transfer means 23 until the electric potential of the pseudo power source line RVa is almost the same with that of the pseudo power source line RVb. Then, all n-MOS transistors 15a-1-15a-n and p-MOS transistors 15-1-15-n are turned on. At transition from the active mode to sleep mode, after all n-MOS transistors 15a-1-15a-n and a-MOS transistors 15-1-15-n are turned off, the electric charge is transferred between the pseudo power source line RVa and the pseudo power source line RVb by the electric charge transfer means 23 until the electric potentials are almost the same level.
Inventors:
Tadahiko Ogawa
Application Number:
JP23661798A
Publication Date:
July 11, 2001
Filing Date:
August 10, 1998
Export Citation:
Assignee:
NEC
International Classes:
H01L21/822; H01L27/04; (IPC1-7): H01L27/04; H01L21/822
Domestic Patent References:
| JP10242840A |
Attorney, Agent or Firm:
Shiroyuki Hori