Title:
DISTORTION LIMITING AMPLIFIER FOR POWER AMPLIFIER
Document Type and Number:
Japanese Patent JPH07147525
Kind Code:
A
Abstract:
PURPOSE: To limit the distortion caused by the clipping of an inverted amplifier by conducting the FET of a feedback loop used for adjusting the level of input signals in response to the clipping of the amplifier and shunting the input signals to the grounding potential. CONSTITUTION: Variable level audio signals 142 from a signal source 102 are outputted through a distortion limiting amplifier 110. As the clipping caused by the signals 142 in the amplifier 110 increases, the voltage appears at a node 112 also increases. When the voltage at the node 112 exceeds a reference voltage, a comparator 107 generates a pulse which proceeds to the positive side through a diode 111. A capacitor C1 and a resistor R3 integrate the pulse so as to charge the capacitor C1 . When the capacitor C1 is charged (when the amplifier 110 makes clipping), the negative voltage at the node 114 of an FET Q1 decreases to the cut-off voltage of the FET Q1 . The FET Q1 is conducted and part of the signals 142 is shunted to the grounding potential and limits the clipping. Resistors R4 and R3 limit the damping time of a circuit.
Inventors:
JIERARUDO DAGURASU NIIRII
ARUFUONSO MORINAA
ANDORIYUU SHIRIRU KUROSHIYUMAR
ROBAATO TERII ZEFU
ARUFUONSO MORINAA
ANDORIYUU SHIRIRU KUROSHIYUMAR
ROBAATO TERII ZEFU
Application Number:
JP15130394A
Publication Date:
June 06, 1995
Filing Date:
July 01, 1994
Export Citation:
Assignee:
FORD MOTOR CO
International Classes:
H03G5/16; H03F1/32; H03G1/04; H03G11/00; H03G11/04; (IPC1-7): H03G11/04; H03F1/32; H03G5/16
Attorney, Agent or Firm:
Akira Asamura (3 outside)
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