Title:
分散共有メモリ型マルチプロセッサ及びデータ処理方法
Document Type and Number:
Japanese Patent JP5241384
Kind Code:
B2
Abstract:
A distributed shared memory multiprocessor that includes a first processing element, a first memory which is a local memory of the first processing element, a second processing element connected to the first processing element via a bus, a second memory which is a local memory of the second processing element, a virtual shared memory region, where physical addresses of the first memory and the second memory are associated for one logical address in a logical address space of a shared memory having the first memory and the second memory, and an arbiter which suspends an access of the first processing element, if there is a write access request from the first processing element to the virtual shared memory region, according to a state of a write access request from the second processing element to the virtual shared memory region.
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Inventors:
Akaike Yukihiko
Hitoshi Suzuki
Hitoshi Suzuki
Application Number:
JP2008220730A
Publication Date:
July 17, 2013
Filing Date:
August 29, 2008
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
G06F15/17; G06F9/52
Domestic Patent References:
| JP7160655A | ||||
| JP2081255A | ||||
| JP5290000A | ||||
| JP4333962A | ||||
| JP2003178039A |
Attorney, Agent or Firm:
Ken Ieiri