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Title:
DMA CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPH04296960
Kind Code:
A
Abstract:

PURPOSE: To reduce the overhead of a host system by performing only a single start of the DMA transfer even though plural descriptors should be carried out again.

CONSTITUTION: A descriptor address selection bit 31a is provided to a command area 31 of a descriptor 30 to show whether a descriptor address is set or not. Then a descriptor address area 35 is provided in the descriptor 30 to set end store the address of the descriptor to be carried out next when the bit 31a is active. In such a constitution, just a single start suffices for the DMA transfer through a descriptor despite the presence of plural descriptors to be carried out again. Furthermore the monitoring is not required for the DMA to be carried out by a host system after the DMA transfer is started. Thus the overhead of the host system is reduced and therefore the deterioration of the overall system executing efficiency can be prevented.


Inventors:
KOZU YUHEI
Application Number:
JP132391A
Publication Date:
October 21, 1992
Filing Date:
January 10, 1991
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F13/28; G06F13/00; (IPC1-7): G06F13/28
Attorney, Agent or Firm:
Shin Uchihara



 
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