Title:
DRIVING CIRCUIT OF LIQUID CRYSTAL DISPLAY DEVICE
Document Type and Number:
Japanese Patent JP2007310422
Kind Code:
A
Abstract:
To attain lower power consumption by suppressing a voltage amplitude of a data signal Sj supplied to a data line 114, to the minimum.
When a scanning signal Ysi supplied to a scanning line 112 is set to an H level, the data signal Sj of a voltage in accordance with gradation and writing polarity is applied to the data line 114. Therein, a TFT 116 is turned on and, thereby, charges in accordance with the voltage of the data signal Sj are accumulated into a liquid crystal capacitance CLCand an accumulation capacitance Cstg. Thereafter, the scanning signal Ysi is set to an L level, the TFT 116 is turned off and, when a voltage on the other end of the accumulation capacitance Cstgis raised from a capacitance voltage Vst(-) of lower side to a capacitance voltage Vst(+) of higher side, electric charges corresponding to the raised part of capacitance voltage is distributed to the liquid crystal capacitance CLC. Thereby, a voltage effective value applied to the liquid crystal capacitance CLCcan be made to be a value corresponding to the voltage amplitude or more of the data signal Sj.
COPYRIGHT: (C)2008,JPO&INPIT
Application Number:
JP2007218017A
Publication Date:
November 29, 2007
Filing Date:
August 24, 2007
Assignee:
SEIKO EPSON CORP
International Classes:
G09G3/36; G02F1/133; G09G3/20
Attorney, Agent or Firm:
Masahiko Ueyanagi
Osamu Suzawa
Kazuhiko Miyasaka
