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Title:
DRIVING METHOD FOR ACTIVE-MATRIX LIQUID CRYSTAL DISPLAY DEVICE
Document Type and Number:
Japanese Patent JPH05113772
Kind Code:
A
Abstract:

PURPOSE: To increase efficiency of charging to a liquid crystal layer for each unit of time by forming a gate-on pulse into pulse wave forms divided in multiple parts within one horizontal time.

CONSTITUTION: Gate-on pulses VG1 to VG4 are formed by inputting a clock signal CL shown by a No.5 waveform, data SP shown by a No.6 waveform, and a LOW signal shown by a No.7 waveform into their respective terminals of a line electrode drive circuit. Though a gate-on time of the gate-on pulses VG1 to VG4 is 24μs as before, a cut-off is provided during one-third of the gate-on time, i.e., a gate-off time of LOW level is provided during a middle time of approx. 8μs. Namely, the gate-on pulses VG1 to VG4 are formed with a pulse waveform divided into two with a gate-off time during a middle time of approx. 8μs. The pulse waveform may be divided in multiple parts at least within one horizontal time, and the number of divided parts are not limited.


Inventors:
MIZUKATA KATSUYA
KAWAGUCHI TAKAFUMI
TAKEDA SHIRO
TAKEDA MAKOTO
Application Number:
JP27433191A
Publication Date:
May 07, 1993
Filing Date:
October 22, 1991
Export Citation:
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Assignee:
SHARP KK
International Classes:
G02F1/133; G09G3/36; (IPC1-7): G02F1/133; G09G3/36
Attorney, Agent or Firm:
Shusaku Yamamoto



 
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