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Patent Searching and Data


Title:
DSSC DEMODULATING CIRCUIT
Document Type and Number:
Japanese Patent JPS5668005
Kind Code:
A
Abstract:

PURPOSE: To facilitate and stabilize demodulation by multiplying the frequency of the balanced carrier of a DSSC signal by an even number at a multiplying circuit, by generating a carrier of the same frequency with the balanced carrier at a step- down circuit on the basis of the signal, and by demodulating the DSSC signal by using it.

CONSTITUTION: The DSSC signal 1A applied to input terminal RFIN is applied to transformer T1, where it is branched; one is supplied to double balanced modulator 4, and the other to full-wave rectifying-detecting circuit 5 biased by DC electric wire Eb. Next, signal 1B having the full wave rectified is applied to limiting amplifier 7 via crystal filter 6 and signal IC having nearly constant amplitude is supplied to frequency dividing circuit 8 using FF and frequency-divided by two. Then, its output is applied to frequency filter 9 to eliminate its distortion and the obtained output is sent as demodulating carrier 1D to modulator 4, whose output having been demodulated is sent out via output terminal AFOUT. Thus, the carrier is regenerated by use of information veiled in the DSSC signal.


Inventors:
YOSHIMURA MASAKI
Application Number:
JP14384079A
Publication Date:
June 08, 1981
Filing Date:
November 08, 1979
Export Citation:
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Assignee:
YOSHIMURA MASAKI
International Classes:
H03D1/24; H03D1/22; (IPC1-7): H03D1/22