Title:
デュアルポートメモリセル
Document Type and Number:
Japanese Patent JP6490688
Kind Code:
B2
Abstract:
A multi-port memory cell is disclosed that includes first and second cross-coupled inverter circuits. The input node of each inverter circuit is coupled to the output node of the other inverter circuit to receive the inverted output of the other inverter circuit. The multi-port memory cell includes a first pair of access transistors of a first type, each coupled to the input node of a respective one of the first and second inverter circuits. The multi-port memory cell also includes a second pair of access transistors of the second type, each coupled to the input of a respective one of the first and second inverter circuits. The multi-port cell exhibits advantages in layout compactness and SEU tolerance.
Inventors:
Kamarota, Rafael Shii
Application Number:
JP2016531602A
Publication Date:
March 27, 2019
Filing Date:
March 06, 2014
Export Citation:
Assignee:
XILINX INCORPORATED
International Classes:
H01L21/8244; G11C11/412; G11C11/418; H01L21/8238; H01L27/092; H01L27/11
Domestic Patent References:
| JP2011035398A | ||||
| JP2004235651A | ||||
| JP2007509490A | ||||
| JP7161188A | ||||
| JP2005523625A |
Foreign References:
| US20120228714 |
Attorney, Agent or Firm:
Fukami patent office
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