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Title:
DUAL PORT MEMORY
Document Type and Number:
Japanese Patent JPH04298882
Kind Code:
A
Abstract:

PURPOSE: To read out only a part of one line of data in a memory cell array by stopping an access at an arbitrary address of a data register performing a serial access and transferring the next data from the memory cell array to the register.

CONSTITUTION: A start pointer 2 retains the address from where the serial access is started from a data register 8, and an address counter 13 consecutively generates addresses according to an input floc. A stop pointer 11 retains an address signal from the address counter 13, a comparator circuit 12 compares the value of the stop counter 11 with the value of the address counter 13, and a selector 9, when it receives the output of the comparator circuit 12, stops the updating of the address where the value of the data register 8 is read out.


Inventors:
TAMURA MASANORI
Application Number:
JP6422791A
Publication Date:
October 22, 1992
Filing Date:
March 28, 1991
Export Citation:
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Assignee:
NEC CORP
International Classes:
G11C8/04; G11C11/401; G11C11/41; (IPC1-7): G11C8/04; G11C11/401; G11C11/41
Attorney, Agent or Firm:
Uchihara Shin



 
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