Title:
DUMMY WAFER AND METHOD FOR MANUFACTURING THE SAME
Document Type and Number:
Japanese Patent JP2020178080
Kind Code:
A
Abstract:
To provide a dummy wafer which can reduce chipping and cracking of a wafer, and can omit an adhesive layer and can prevent an adhesive component from being converted into a contamination source, and a method for manufacturing the same.SOLUTION: A dummy wafer includes a regenerated wafer 2 composed of a silicon wafer, and a coating protective layer 10 which is stacked on at least both the front and back surfaces other than a peripheral edge part 4 of the regenerated wafer 2 by baking treatment and has a thickness of 10 μm or more, in which the coating protective layer 10 contains at least a polyether ketone resin. Since the regenerated wafer 2 and the coating protective layer 10 are brought into contact with each other by baking treatment, mechanical strength of the regenerated wafer 2 is improved, and chipping and cracking of the dummy wafer 1 can be prevented. The coating protective layer 10 becomes strong because of the baking treatment, and adhesion of the coating protective layer 10 becomes stable. Since the main component of the coating protective layer 10 is a polyether ketone resin, heat resistance, chemical resistance, wear resistance and slide characteristics of the dummy wafer 1 are improved, and an excellent low water absorption ratio can be obtained.SELECTED DRAWING: Figure 1
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Inventors:
SUDA NOBUMITSU
TAKISE SHIGERU
ASO TSUTOMU
TAKISE SHIGERU
ASO TSUTOMU
Application Number:
JP2019080409A
Publication Date:
October 29, 2020
Filing Date:
April 19, 2019
Export Citation:
Assignee:
SHINETSU POLYMER CO
International Classes:
H01L21/02
Attorney, Agent or Firm:
Eisuke Fujimoto
Masayoshi Kanda
Akio Miyao
Nobuyuki Baba
Masayoshi Kanda
Akio Miyao
Nobuyuki Baba