PURPOSE: To generate a duty control pulse with high accuracy by a digital element circuit by supplying an output of a clock signal counter to a duty ratio decoder and a frequency decoder to apply logic operation to outputs of both the circuits.

CONSTITUTION: When a reset signal of a counter 1 changed from a low level to a high level and the reset state is released, and a clock signal is inputted for a prescribed period, the output of a binary counter 1 is increased synchronously with the clock signal. In such a case, a preset duty ratio and a decode value corresponding to the frequency are set to a duty ratio decoder 2 and a frequency decoder 3 in this case. When the output of the counter 1 is coincident with the decoded value or exceeds the decode value or goes down therefrom, the output of the decoders 2,3 is changed. The output signal A of the decoder 2 and the signal C being the result of 1/4 frequency division of the output signal B of the decoder 3 are ANDed by an AND circuit 5 to obtain an output D. Thus, the duty control pulse with high accuracy is generated.