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Title:
DYNAMIC FLIP-FLOP
Document Type and Number:
Japanese Patent JP2002208841
Kind Code:
A
Abstract:

To provide a dynamic flip-flop where a floating signal will not make the voltage held to fall below the substrate voltage level in a P-type semiconductor substrate and will not make a voltage that exceeds the substrate voltage level in an N-type semiconductor substrate.

In this dynamic flip-flop, an N-type MOSFET 5 controlled by an output signal MX of an inverter 2 and an N-type MOSFET 6 controlled by an output signal A of an inverter 4 are attached as switches for causing short-circuiting signals M and QX to be floated to a substrate.


Inventors:
SHIBUYA YOSHIHIRO
Application Number:
JP2001004054A
Publication Date:
July 26, 2002
Filing Date:
January 11, 2001
Export Citation:
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Assignee:
SEIKO INSTR INC
International Classes:
H03K3/356; G11C19/00; H01L27/04; H03K3/00; H03K3/037; H03K3/289; H03K19/00; H03K23/52; (IPC1-7): H03K3/356; H03K23/52
Domestic Patent References:
JPS6236913A1987-02-17
JPS61161826A1986-07-22
JPS6424505A1989-01-26
Attorney, Agent or Firm:
Masaaki Sakagami