PURPOSE: To obtain a dynamic RAM for increasing a circuit margin, by disposing a voltage impressing circuit for impressing a negative voltage on a memory cell correspondingly to the data of 'L' level.

CONSTITUTION: At the time of writing the data of 'H' level, a transistor 3 is not turned on, but a VCC is transferred to a bit line 14 and a positive voltage is stored in the capacitor 11 of the memory cell M. At the time of writing the data of the 'L' level, an inverter circuit 2 is turned on correspondingly to the data of the 'L' level to excite the transistor 3, impress the negative voltage outputted from a negative voltage generating circuit 1 to the capacitor 11 of the memory cell M through the bit line 14 and store a negative charge. Thereby, a potential difference between the 'H' level and the 'L' level at the time of reading can be increased to increase the circuit margin.