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Title:
ECL CIRCUIT
Document Type and Number:
Japanese Patent JPS631212
Kind Code:
A
Abstract:

PURPOSE: To increase the switching speed with an ECL circuit by accelerating the working speed of a current switch set at an upper stage and connected to a transistor which is turned on by a current switch set at a lower stage when this current switch is changed over with switch of a clock signal.

CONSTITUTION: The bypass resistances R1 and R2 are connected between a power supply VEE and collectors of transistors TRQ5 and Q6 forming a current switch of a lower stage. The currents of such levels that do not cut off the current switches 1 and 2 of upper stages are supplied to these switches 1 and 2 connected in series to the TRQ5 and Q6 When these TR are cut off by the switch of a clock signal. Therefore the working speeds of both switches 1 and 2 are increased when a current switch 3 is changed over. Then the switching speed of an ECL circuit is also increased in a switch mode of the input signal.


Inventors:
SHIMOTSUHAMA ISAO
OGAWA KAZUMI
Application Number:
JP14290086A
Publication Date:
January 06, 1988
Filing Date:
June 20, 1986
Export Citation:
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Assignee:
FUJITSU LTD
FUJITSU VLSI LTD
International Classes:
H03K17/62; H03K3/286; H03K19/013; H03K19/086; (IPC1-7): H03K3/286; H03K17/62; H03K19/013; H03K19/086
Domestic Patent References:
JPS5428707A1979-03-03
JPS56744A1981-01-07
Attorney, Agent or Firm:
Aoki Akira