PURPOSE: To increase the switching speed with an ECL circuit by accelerating the working speed of a current switch set at an upper stage and connected to a transistor which is turned on by a current switch set at a lower stage when this current switch is changed over with switch of a clock signal.
CONSTITUTION: The bypass resistances R1 and R2 are connected between a power supply VEE and collectors of transistors TRQ5 and Q6 forming a current switch of a lower stage. The currents of such levels that do not cut off the current switches 1 and 2 of upper stages are supplied to these switches 1 and 2 connected in series to the TRQ5 and Q6 When these TR are cut off by the switch of a clock signal. Therefore the working speeds of both switches 1 and 2 are increased when a current switch 3 is changed over. Then the switching speed of an ECL circuit is also increased in a switch mode of the input signal.
OGAWA KAZUMI
FUJITSU VLSI LTD
JPS5428707A | 1979-03-03 | |||
JPS56744A | 1981-01-07 |