To reduce a data rate per terminal by selectively injecting an electric charge transferred to a final gate into one side of respective floating diffusions and reading it out in response to the respective levels of output gate signals applied to respective output gates.
Corresponding to the voltage levels of output gate signals VGO1 and VGO2 applied from a gate signal generating circuit 4, the electric charge transferred to a final gate HL is selectively and distributedly injected to a floating diffusion FD1 or FD2 by respective output gates GO1 and GO2. Besides, an amplifier 2 is connected to the floating diffusions FD1 and FD2 and the respective output signals VFD1 and VFD2 are individually read out and outputted to a signal processing circuit 3. Thus, the electric charge transferred from a CCD 1 is alternately injected into the respective divided floating diffusions FD1 and FD2 and read out as the output signals VFD1 and VFD2.
OTSUDA KAZUNORI