To provide a method of manufacturing a semiconductor device in which a source electrode is formed to be commonly connected to a plurality of source regions formed on a main surface, current density can be made uniform by reducing the resistance in an in-plane direction of the source electrode, and the number of wires for connecting a source and a lead as well as positions where electrodes are bonded can be freely designed in a power MOS transistor.
An electrode structure according to the present invention comprises: a pad electrode 10a; a copper plating layer 10e formed on the pad electrode 10a by an electrolytic plating method; and a nickel plating layer 10f and a gold plating layer 10g that are formed by an electroless plating method to cover the upper and side surfaces of the copper plating layer 10e.
KAMEYAMA KOJIRO
OIKAWA TAKAHIRO
SANYO SEMICONDUCTOR CO LTD
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