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Title:
ELECTROLESS PLATING CATALYST AND LAMINATED SHEET FOR ADDITIVE-PROCESS PRINTED CIRCUIT BOARD
Document Type and Number:
Japanese Patent JPH06228758
Kind Code:
A
Abstract:

PURPOSE: To obtain the catalyst with the falling of an acceptor substance reduced by depositing the substance on the silicon carbide of a diamond crystal structure.

CONSTITUTION: The silicon carbide having a diamond crystal structure is reduced in lattice defects since it consists only of a covalent bonds and is physically and chemically stable as there are no unpaired electron on the atom. Accordingly, the falling of the acceptor substance deposited on the silicon carbide is reduced since its carrier is practically insoluble in a roughening soln. The substrate is impregnated with a thermosetting resin varnish mixed with a catalyst and laminated to obtain a laminated sheet for the additive-process printed circuit board. Consequently, the time until the inner wall of a through- hole has been covered with a metallic layer by electroless plating is shortened, the moisture infiltrated from the inner wall of the through-hole is reduced, and the solder heat resistance and the solderability of the through-hole are not deteriorated.


Inventors:
FUKAI HIROYUKI
IRINO TETSURO
Application Number:
JP1433893A
Publication Date:
August 16, 1994
Filing Date:
February 01, 1993
Export Citation:
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Assignee:
HITACHI CHEMICAL CO LTD
International Classes:
C23C18/28; H05K1/03; H05K3/18; (IPC1-7): C23C18/28; H05K1/03; H05K3/18
Attorney, Agent or Firm:
Hirose Akira



 
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