Title:
電子デバイス設計支援装置、電子デバイス設計支援方法、電子デバイス製造方法、及びプログラム
Document Type and Number:
Japanese Patent JP3848255
Kind Code:
B2
Abstract:
During designing an electronic device, a test method and a peripheral circuit are also designed using logic data for simulating the operation of the electronic device and the characteristics of a test apparatus used for testing an electronic device. By using the designed test method and logic data representing the operation of the designed peripheral circuit, simulation to judge whether or not the electronic device can be tested. According to the results of the simulation, the designs of the electronic device, the test method, and the peripheral circuit are altered. To optimize the designs of the electronic device, the test method, and the peripheral circuit, simulation is repeated.
Inventors:
Yasuo Furukawa
Application Number:
JP2002536915A
Publication Date:
November 22, 2006
Filing Date:
October 11, 2001
Export Citation:
Assignee:
Advantest Corporation
International Classes:
G06F17/50; G01R31/3183; H01L21/82
Domestic Patent References:
| JP5006406A | ||||
| JP61226844A | ||||
| JP11015860A | ||||
| JP5006409A | ||||
| JP2000082094A | ||||
| JP7282093A |
Attorney, Agent or Firm:
Akihiro Ryuka