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Patent Searching and Data


Title:
ELECTRONIC DEVICE RESIN SEALING METHOD AND LEAD FRAME PROVIDED THEREFOR
Document Type and Number:
Japanese Patent JPH07135230
Kind Code:
A
Abstract:

PURPOSE: To lessen resin wasted in a throwaway part such as a cull or a runner in quantity so as to reduce the amount of resin used to an irreducible minimum and to enhance resin material in use yield in a resin sealed-type semiconductor package of an electronic device.

CONSTITUTION: A lead frame 1 is equipped with a resin tablet hole 5 at its center where a resin tablet of molding material is located, the resin tablet hole 5 is regarded as a cull (pot), and four gates 12 are provided around the resin tablet hole 5 in a radial manner, and also the lead frame 1 is provided with semiconductor device forming region ICs where semiconductor devices are mounted and which are provided corresponding to the gates 12. Resin is directly poured into a cavity from a pot through the gates 12 connected to the cavity without using a runner. By this setup, a pot is disposed at the center of a lead frame, so that a distance between the pot and a cavity is short, and resin wasted in a throwaway part such as a cull or a runner used in a conventional molding structure can be lessened in amount.


Inventors:
HIGUCHI AKIRA
HIRASHIMA TOSHINORI
MURAKAMI HAJIME
SHIMIZU KAZUO
ARAI KATSUO
SOBA TAKUMI
KOYAMA YASUHIRO
TOGAWA MITSUO
Application Number:
JP27926493A
Publication Date:
May 23, 1995
Filing Date:
November 09, 1993
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
B29C45/26; B29C45/02; B29C45/14; H01L21/56; H01L23/50; B29L31/34; (IPC1-7): H01L21/56; B29C45/02; B29C45/14; B29C45/26; H01L23/50
Attorney, Agent or Firm:
Ogawa Katsuo