Title:
電子装置
Document Type and Number:
Japanese Patent JP4784794
Kind Code:
B2
Abstract:
The present invention relates to an electronic device that suppresses reduction in reception sensitivity and occurrence of distortion when IC cards are used while stacked. A loop antenna (1) equipped to the IC card has four turns, and it is designed so that one turn comprises a linear portion (L2), a curved line portion (L3), a linear portion (L4) and a curved line portion (L5), for example. When two loop antennas (1) having such a shape is stacked with being faced in the opposite directions, the corners thereof are not overlapped. For example, the corner formed of the curved line portion (L3) and the linear portion (L4) of the loop antenna (1) is overlapped with the curved line portion (L3) of the loop antenna (1) superimposed with being faced in the opposite direction so that the corners are not overlapped and the overlap portion is reduced as a whole. The present invention may be applied to an IC card for receiving/transmitting data under non-contact state.
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Inventors:
Shigeru Arisawa
Osamu Ishii
Tsuchiya Juji
Osamu Ishii
Tsuchiya Juji
Application Number:
JP2001018694A
Publication Date:
October 05, 2011
Filing Date:
January 26, 2001
Export Citation:
Assignee:
ソニー株式会社
International Classes:
B42D15/10; G06K17/00; G06K19/07; G06K19/077; H01Q1/22; H01Q1/38; H01Q1/52; H01Q7/00; H01Q21/28; H01Q23/00
Domestic Patent References:
| JP2000137777A | ||||
| JP2000222542A | ||||
| JP2001005930A | ||||
| JP2001007629A |
Attorney, Agent or Firm:
Yoshio Inamoto