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Patent Searching and Data


Title:
ELECTRONIC DEVICE
Document Type and Number:
Japanese Patent JPH07307649
Kind Code:
A
Abstract:

PURPOSE: To easily design the electronic device where a signal is transmitted through a bus line and to reduce the power consumption in the standby state by increasing an allowable maximum reflection factor to take a large margin of input/-output standards.

CONSTITUTION: When the low level is outputted as data DQ and the voltage value of a bus line 75 is set to VOL1=Vref-0.6V, VOL2=Vref-0.1V is held as the voltage value of the bus line 75 by a latch circuit 85 in the standby state thereafter. When the high level is outputted as data DQ and the voltage value or the bus line 75 is set to VOH1=Vref+0 6V, VOH2=Vref+0.1V is held as the voltage value of the bus line 75 by the latch circuit 85 in the standby state thereafter.


Inventors:
OKAJIMA YOSHINORI
KANEZASHI KAZUYUKI
Application Number:
JP9999094A
Publication Date:
November 21, 1995
Filing Date:
May 13, 1994
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F3/00; G06F12/00; G06F13/16; G11C11/401; H03K5/02; H04L25/02; H04L25/03; (IPC1-7): H03K5/02; G06F3/00
Attorney, Agent or Firm:
Tetsuo Hirado