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Patent Searching and Data


Title:
ELECTRONIC DUMMY CIRCUIT
Document Type and Number:
Japanese Patent JPH03195361
Kind Code:
A
Abstract:

PURPOSE: To prevent discontinuity and peak charge, etc., of a circuit current in the event of a light load by detecting a voltage of the partial pressure resistor inserted between a smoothing circuit and stabilized circuit to compare with a reference voltage, and connecting a resistor to a main DC output circuit in parallel through a semiconductor switching element by the output of a comparator.

CONSTITUTION: A voltage (ei) detected by a partial pressure circuit in a multi-DC output circuit is inputted to a negative entry terminal of a comparator 14, and a reference voltage Es1 is inputted to a positive terminal. An output voltage of the comparator 14 is Es1-ei, so that when a multi-DC output circuit voltage drops, the output voltage is ei<Es1, the output of the comparator 14 is H, and a semiconductor switching element 13 is turned ON. For that purpose, a resistor 12 is connected to a main DC output circuit in parallel through the semiconductor switching element 13, and a circuit current is increased by the current to bypass the resistor 12.


Inventors:
SHISHIKURA NOBUO
Application Number:
JP33339689A
Publication Date:
August 26, 1991
Filing Date:
December 22, 1989
Export Citation:
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Assignee:
NIPPON ELECTRIC IND
International Classes:
H02M3/28; (IPC1-7): H02M3/28
Attorney, Agent or Firm:
Takeo Masuda