Title:
ELECTRONIC PACKAGING AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JP3160216
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To prevent generation of creases in a flexible circuit board due to the difference in coefficient of thermal expansion, by providing distortion avoiding means at a position near a connecting part between a protruding lead portion and a contact portion of a semiconductor element.
SOLUTION: An electronic packaging 11 has a rigid member 13, a flexible circuit board 15 fixed to the rigid member 13, a semiconductor element 19 electrically connected at a contact portion 21 to a selected signal line 23 of a conductor layer 24 of the board 15, and an external conductive element 25. At a position near a connecting part between a protruding lead portion 31 and the semiconductor element 19, distortion avoiding means 37 is provided on the protruding lead portion 31. Thus, creases in the board 15 are substantially eliminated by the operation of forming the distortion avoiding means 37 and the operation of coupling the chip 19 at the contact portion 21 which are performed simultaneously. Therefore, generation of creases in the flexible circuit board 15 due to the difference in coefficient of thermal expansion may be prevented.
Inventors:
David James Alcoe
Stephen Wayne Anderson
Efan Guo
Eric Arthur Johnson
Stephen Wayne Anderson
Efan Guo
Eric Arthur Johnson
Application Number:
JP863297A
Publication Date:
April 25, 2001
Filing Date:
January 21, 1997
Export Citation:
Assignee:
International Business Machines Corporation
International Classes:
H01L21/60; H01L23/12; H01L23/13; H01L23/16; H01L23/373; H01L23/495; H01L23/498; (IPC1-7): H01L23/12; H01L21/60; H01L23/373
Domestic Patent References:
| JP864635A | ||||
| JP8148530A |
Attorney, Agent or Firm:
Hiroshi Sakaguchi (1 person outside)