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Title:
ELECTRONIC TIMEPIECE
Document Type and Number:
Japanese Patent JPS58207702
Kind Code:
A
Abstract:

PURPOSE: To prevent the fluctuation of capacitance of a capacitive element due to power supply fluctuation, by providing a constant voltage circuit which makes a DC voltage constant impressed between two terminals extracting the capacitance of an MOS type varactor element.

CONSTITUTION: A reference voltage generating circuit 13 outputs a reference voltage VREF at an output terminal. This reference voltage VREF is inputted to an inverting input terminal of an OPAmp14 and a non-inverting input of the OPAmp14 is connected to a point A, constant voltage terminal. Further, an oscillating amplifying circuit consists of a PMOS16 and an NMOS17, and gates and drains of the MOSes 16, 17 are connected respectively. Further, the source of the MOS16 is connected to VDD and the source of the MOS17 is connected to the point A. In this circuit constitution, even if the power supply voltage is fluctuated because of any cause, the voltage at the point A is controlled to be equal to the reference voltage VREF at all times by means of a feedback circuit comprising the Amp14 and the MOS15, allowing to keep a constant voltage. Thus, a DC bias of the MOS type varactor element 21 is kept constant and the change in the capacitance value because of the power supply voltage fluctuation is prevented.


Inventors:
TABATA JIYUNICHI
Application Number:
JP9104082A
Publication Date:
December 03, 1983
Filing Date:
May 28, 1982
Export Citation:
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Assignee:
SEIKO INSTR & ELECTRONICS
International Classes:
G04G3/00; H03B5/32; H03L1/00; (IPC1-7): G04G3/00; H03B5/36
Attorney, Agent or Firm:
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