Title:
ELECTROSTATIC BREAKDOWN PREVENTIVE CIRCUIT IN SEMICONDUCTOR DEVICE AND FORMATION THEREOF
Document Type and Number:
Japanese Patent JP3128334
Kind Code:
B2
Abstract:
PURPOSE: To provide an electrostatic breakdown preventive circuit in a semiconductor device of a structure, wherein while a sufficient resistance component of voltage drop to charge due to static electricity is kept, a wiring resistance in the whole circuit is made small and a reduction in a chip size is also made possible, and a method of forming the circuit.
CONSTITUTION: A source/drain part 103 of an output transistor is formed on a silicon single crystal semiconductor substrate, then, contact holes 106, which make, a high-resistance wiring layer 104 connect with the part 103 of the transistor, are opened by a photolithography/etching technique and after that, the layer 104 is formed. Contact holes 105 are opened and an output pad 101 and an at aluminum wiring 102 are formed. The constituent elements to obtain a resistance of a voltage drop component as an electrostatic breakdown preventive circuit are the sheet resistivity of the layer 104, the diameters of the contact holes 105 and 106 and the interval between the contact holes 103 and 104 and these three elements are combined with one another.
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Inventors:
Hideyuki Ando
Ikuo Kurachi
Ikuo Kurachi
Application Number:
JP18698992A
Publication Date:
January 29, 2001
Filing Date:
July 14, 1992
Export Citation:
Assignee:
Oki Electric Industry Co., Ltd.
International Classes:
H01L27/04; H01L21/822; (IPC1-7): H01L27/04; H01L21/822
Domestic Patent References:
| JP63255955A | ||||
| JP61295651A |
Attorney, Agent or Firm:
Kenji Ohnishi